Insulating layers are widely used on microelectronic substrates, such as integrated circuit substrates. As the integration density of integrated circuit substrates continues to increase, the step heights on the microelectronic substrates may continue to increase. For example, as integrated circuit memory devices become more highly integrated, three-dimensional capacitors may be used which may create step heights of 1 .mu.m or more. These larger step heights may make it more desirable to include insulating layers which can planarize these steps. The planarized steps may allow thinner conductive layers and wider ranges of materials to be used for conductive layers.
Insulating layers are used in integrated circuits in at least three applications. An insulator may be used as an interlayer dielectric (ILD) beneath a patterned conductive layer. An insulating layer may be used as an intermetallic dielectric (IMD) between patterned conductive layers. Finally, an insulating layer may be used as a passivation layer on the outer surface of a conductive layer. In all of these applications, it may be desirable to provide an insulating layer having good planarization characteristics.
Borophosphosilicate silicon glass (BPSG) reflow has been proposed to provide planarized insulating layers. In a BPSG reflow, BPSG is formed on a microelectronic substrate and then reflowed at high temperatures of about 850.degree. C. for thirty minutes. Unfortunately, these reflow temperatures may be excessively high for highly integrated circuits.
Planarized dielectric layers have also been provided by etching 03-tetraethyl orthosilicate undoped silicate glass (03-TEOS USG). Unfortunately, the etch-back of 03-TEOS USG may introduce complicated processing steps.
Spin-on-glass (SOG) has also been used to obtain planarized insulating layers which can be fabricated at low temperatures using simplified processing. Silicate (Si(OH)4), siloxane ((RO)nSi(OH)4-n) and silsesquioxane types are widely used for SOG materials. The silicate and siloxane are generally mixed with an alcohol-based solvent such as methanol, ethanol, propanol, butanol, pentanol, hexanol, methyl cellosolve, butyl cellosolve, propylene glycol, diethylene glycol, or carbinol.
An SOG layer is generally formed on a microelectronic substrate by coating the SOG material mixed with one or more of the above-described solvents on a microelectronic substrate, and then rotating the substrate to uniformly distribute the material. The SOG material in the liquid state can fill grooves or trenches in the substrate to thereby planarize the substrate.
The solvent is then generally evaporated by baking. The evaporated solvent and a carbon component generated from the solvent are generally degassed at approximately 100.about.400.degree. C.
The SOG layer is then cured, for example by heating. In particular, the silicate or siloxane material is heated so that silanol (Si--OH) groups in the materials can produce H.sub.2 O and cross-link to form a Si--O--Si network, thereby resulting in a solid SOG layer. The solid layer has properties which are similar to those of a conventional SiO.sub.2 layer.
When the siloxane or the silicate material is heated, water is generally produced. Accordingly, the volume of the SOG layer is generally reduced during the curing process. Also, the siloxane SOG generally includes some alkyl groups at the position of the silanol group, so that the area of cross-linking may be reduced, to thereby cause less volume reduction.
Unfortunately, the curing process may generate stress in the SOG layer and thereby cause cracks therein. Siloxane SOG may have good crack resistance when it is thickly coated. Silicate SOG is generally more rigid and may create cracks during heat treatment, even when thickly coated.
The SOG curing process generally uses a furnace, oven or hotplate. For example, the microelectronic substrate is heat-treated at a temperature below 350.degree. C. on a hotplate, and is then heat-treated at a temperature below 500.degree. C. for 30-60 minutes in a furnace.
SOG layers may also be hygroscopic during subsequent processing or merely due to the lapse of time. When moisture is absorbed due to the hygroscopicity, the cross-linking may be destroyed and thereby adversely impact the properties of the SOG layer. In particular, as the hygroscopicity increases, the dielectric property of the SOG insulating layer may decrease. Accordingly, it is desirable to reduce or eliminate the problems of cracking and hygroscopicity in SOG layers.
Additional problems may be created when SOG is used for an intermetallic dielectric (IMD) layer between conductive interconnections. In this environment, a "poisoned via" phenomenon may take place wherein the SOG material which is exposed on the sidewall of a via may cause an increase in the contact resistance. In particular, when the poisoned via phenomenon occurs, outgassing may occur in the SOG of the via sidewall which is exposed when a metal layer is deposited, which may cause large contact resistance.
It is known that the poisoned via phenomenon may be caused by the silanol (Si--OH) group in the SOG material. For example, when an aluminum layer is deposited on the Si--OH group, an oxide layer of Al.sub.2 O.sub.3 may be formed, which may thereby increase the contact resistance. Also, when an O.sub.2 plasma treatment for striping photoresist is performed, the amount of Si--OH in the SOG layer may increase and the contact resistance may further deteriorate.
In order to reduce the contact resistance, it is known to seal the SOG exposed on the via sidewall using Ti or TiN. Methods for eliminating the SOG in the via by etchback have also been proposed. Unfortunately, the sealing of the SOG on the via sidewall may use a complicated process. Moreover, it may be difficult to detect an end-point during the etchback process. SOG may therefore remain on the via sidewall, resulting in high contact resistance.
Accordingly, in order to effectively use SOG as an insulating layer for microelectronic devices, it is desirable to reduce or eliminate problems with cracking, hygroscopicity and high contact resistance. It is believed that all of these problems may result from the high temperature curing which is used to eliminate moisture and the silanol group from the SOG. Unfortunately, if the curing temperature is lowered, the moisture and the silanol group may not be completely eliminated and the etch rate of the SOG layer may be increased, thereby causing an increase in the size of the contact holes. Accordingly, it is desirable to increase the curing temperature in SOG while simultaneously preventing cracking. Alternatively, it is desirable to lower the curing temperature while simultaneously eliminating moisture and the silanol group.
It has been previously proposed to use ultraviolet (UV) light irradiation and ion implantation to lower the curing temperature SOG while simultaneously eliminating moisture and the silanol group. In particular, U.S. Pat. No. 4,983,546 to Hyun et al. entitled "Method for Curing Spin-On-Glass Film by Utilizing Ultraviolet Irradiation" discloses a method for curing spin-on-glass by establishing a predetermined initial temperature in a heating chamber with an ultraviolet light source, introducing a wafer into the heated chamber, and gradually increasing the temperature to a predetermined maximum temperature. The SOG film is irradiated with ultraviolet light at a predetermined wavelength simultaneously with the application of heat at the maximum temperature for a predetermined time. The wafer is then cooled.
U.S. Pat. No. 5,192,697 to Leong entitled "SOG Curing by Ion Implantation" discloses implantation of ions such as argon or arsenic into a spin-on-glass layer. The action of the ions moving through the spin-on-glass layer causes internal heating. The heating cures the spin-on-glass layer.
Notwithstanding the above advances, it is desirable to provide improved methods of curing SOG at lower temperatures, to thereby prevent cracks and eliminate moisture and silanol groups from spin-on-glass.